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ver. 1.0 specification for colour stn-lcm (preliminary) model no. TM128160EKCWF tianma microelectronics co. ltd ??a??1ye?t1???
/26 ver. 1.0 1 revision record date ver. ref. page revision no. revision item
/26 ver. 1.0 2 contents 1. display characteristics 2. mechanical description 3. limiting values (absolute maximum rating system ) 4. operating range and electrical and optical characteristic 5. circuit block diagram 6. interface signal 7. interface timing chart 8. test of reliability 9. inspection requirement 10. quality level 11. precautions for use of lcd modules
/26 ver. 1.0 3 1. display characteristics parameter specification resolution 128*(rgb)(w)*160(h) illumination mode transflective number of colors 65k number of gray scales 32 normally white or black black viewing direction 6:00 backlight and color led,white duty ratio 1/160 application mobile phone 2. mechanical description (1) mechanical data parameter specifications unit construction cof / overall dimension 40.8x49.5x3.4 mm viewing area 33.3x41.0 mm active area 31.2092x39.025 mm number of dots 128x3x160 dots dot pitch 0.0813x0.244 mm dot size 0.0713x0.229 mm
/26 ver. 1.0 4 (2) outline dimensions
/26 ver. 1.0 5 3.limiting values (absolute maximum rating system ) value subclause parameters symbol min. max. unit 3.1 operating ambient temperature t op -20 70 ?? 3.2 storage temperature t stg -30 80 ?? 3.3 3.3.1 3.3.2 3.3.3 supply voltage(s) (select either the pair of 3.3.1 and 3.3.2 or 3.3.3 supply voltage for logic drive supply voltage for lcd drive supply voltage(s) for module v dd - v ss v dd - v ee or v ee - v ss or v dd - v o or v o - v ss v mdl or v mdl1, v mdl2, etc. -0.3 -0.3 -0.3 4.0 18.0 4.0 v v v 3.4 input signal voltage v in -0.4 v dd +0.3 v 3.5 voltage of integrated light source (where appropriate) 4.0 v 3.6 operation humidity 20 65 %rh storage humidity 10 80 %rh
/26 ver. 1.0 6 4. operating range and electrical and optical characteristics 4.1 recommended operating range va l u e subclause parameters (characteristics at top=25 ?? unless otherwise spectified) symbol min. max. unit 4.1.1 4.1.1.1 4.1.1.2 4.1.1.3 operating voltage range of supply voltage(s) (select either the pair of 4.1.1and 4.1.2,or 4.1.3) supply voltage for logic drive supply voltage for lcd drive supply voltage(s) for module v dd -v ss v dd -v ee or v ee -v ss or v dd -v o or v o -v ss v mdl or v mdl1 ,v mdl2 ,etc 1.8 - 2.4 3.3 - 3.3 v v v 4.1.2 4.1.2.1 4.1.2.2 operating voltage range of input signal voltages input signal voltage,high input signal voltage,low v in v inh v inl 0.8v dd -0.3 v dd 0.2v dd v v 4.1.3 operating voltage range of analogue light source(where appropriate) 3.3 3.7 v 4.1.4 4.1.4.1 and/or 4.1.4.2 operating frequency range(s) (where appropriate) operating frame frequency range oscillator frequency range(line rate) f op f frm f osc - 28 - 36 hz hz khz
/26 ver. 1.0 7 4.2 electrical and optical characteristics value subclasses characteristics at top=25 ?? unless otherwise specified symbol unit min. max . 4.2.1 supply current at specified frame frequency, specified operating supply voltage, with an adequate display pattern and other electrical driving conditions chosen in order to achieve extreme supply current / tot or / dd and/or / ee ma 2.5 4.2.2 operating current of integrated light source at its specified operating voltage(where appropriate) (optional) /cs ma 60 4.2.3 contrast ratio :top=25 ?? , | x=0, | y=0 vlcd=vop cr dir and/or cr diff 15 4.2.4.1 operating display luminance at specified viewing direction and measuring point(s) (where appropriate) l cd/m2 30 4.2.4.2 luminance uniformity (where appropriate) l uni % 60 4.2.5 viewing angle range (cr ?y 2.0) x and y deg deg -40 -30 35 30 4.2.6.1 rise time at 25 ?? t on ms 200 4.2.6.2 fall time at 25 ?? t off ms 200 4.2.8.1 chromaticity of white (x, y) (where appropriate) x w , y w - tbd - 4.2.8.2 chromaticity of red (x, y) (where appropriate) x r , y r - tbd - 4.2.8.3 chromaticity of blue (x,y) (where appropriate) x b , y b - tbd - 4.2.8.4 chromaticity of green (x, y) (where appropriate) x g , y g - tbd -
/26 ver. 1.0 8 4.3 definition of optical characteristics 4.3.1 definition of viewing angle top top bottom bottom 4.3.2 definition of contrast ratio brightness state selected brightness state unselected = b2/b1 = ratio contrast measuring conditions: 1) ambient temperature: 25 ?? 2) frame frequency: 70.0hz 4.3.3 definition of response time turn on time: t on = t d + t r turn off time: t off = t d + t f measuring condition: 1) operating voltage: 16.2v 2) frame frequency: 70.0hz
/26 ver. 1.0 9 5. circuit block diagram
/26 ver. 1.0 10 6. interface signal 6.1 pin assignment pin no. symbol level description 1 nc - not connect 2 vci1 - voltage-input pin for step-up circuit 1 3 vciout - outputs a regulated voltage derived from vcc 4 c11- - when step-up circuit is used, connect a step-up 5 c11+ - capacitor 6 c12- - when step-up circuit is used, connect a step-up 7 c12+ - capacitor 8 vout - a voltage that doubles or triples the voltage between vci1 and gnd is output here. 9 vsh - selection level for the segment signal 10 vm - non-selection level for the common signal 11 vrefm - connect capacitor for stabilization for internal power 12 biasc - supply 13 vrefl - inputs reference vol tage for lcd drives power supply 14 test1 - test pin. must be fixed at gnd level. 15 test2 - test pin. must be fixed at gnd level. 16 im0/id h/l selects the mpu interface mode 17 im1 h/l 18 im2 h/l 19 osc1 - connect an external resistor for r-c oscillation 20 osc2 - connect an external resistor for r-c oscillation 21 reset2 h/l 2 reset pins, use one pin and open unused pin 22 agnd 0 gnd for power supply circuit. 23 gnd 0 gnd logic 0 v 24 agnd 0 gnd for power supply circuit. 25 avcc - vcc for power supply circuit 26 vcc - power supply vcc: + 2.2 v to + 3.6 v 27 cs h/l selects the hd66766r,l: hd66766r is selected 28 rs h/l selects the register,l: index/status h: control 29 e/wr h/l for 68-system bus interface, serves as enable signal for 80-system bus interface, serves as a write strobe
/26 ver. 1.0 11 pin assignment(continue) pin no. symbol level description 30 rw/rd h/l for 68-system select data read/write operation for 80-system bus interface, serves as a read strobe 31 db0 h/l for a clock-synchronous serial interface,db0 serves 32 db1 h/l as the serial data input pin (sdi). the input level is 33 db2 h/l read on the rising edge of the scl signal. 34 db3 h/l for a clock-synchronous serial interface, db1 serves 35 db4 h/l as a serial data output pin (sdo). successive bit 36 db5 h/l values are output on the falling edge of the scl 37 db6 h/l signal. 38 db7 h/l 39 db8 h/l for a synchronous clock interface, e/wr 40 db9 h/l serves as the synchronous clock signal:scl 41 db10 h/l 42 db11 h/l db2-db15 serves as a 16-bit bi-directional data bus. 43 db12 h/l for an 8-bit bus interface, data transfer uses 44 db13 h/l db15-db8; fix unused db7-db0 to the vcc or gnd 45 db14 h/l level. for a synchronous clock interface or unused 46 db15 h/l pins, fixed to the vcc or gnd level. 47 vci2 - connect capacitor for stabilization 48 c21- - when step-up circuit is used, connect a step-up 49 c21+ - capacitor 50 c22- - when step-up circuit is used, connect a step-up 51 c22+ - capacitor 52 c23- - when step-up circuit is used, connect a step-up 53 c23+ - capacitor 54 c24- - when step-up circuit is used, connect a step-up 55 c24+ - capacitor 56 vch - selection level for the common signal 57 vcl - selection level for the common signal 58 cem - connect a step-up capacitor to generate vcl level 59 cep - connect a step-up capacitor to generate vcl level 60 reset1 h/l 2 reset pins, use one pin and open unused pin
/26 ver. 1.0 12 6.2 example of external circuit(8080 mode)
/26 ver. 1.0 13 7. interface timing chart ac c haracteristics f igure 15: parallel bus timing characteristics (for 8080 mcu) (v dd =2.5v to 3.3v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t as80 t ah80 cd address setup time address hold time 0 10 ? ns t cy80 system cycle time 8 bits bus (read) (write) 4 bits bus (read) (write) 140 128 128 128 ? ns t pwr80 wr1 pulse width 8 bits (read) 4 bits 65 35 ? ns t pww80 wr0 pulse width 8 bits (write) 4 bits 35 35 ? ns t hpw80 wr0, wr1 high pulse width 8 bits bus (read) (write) 4 bits bus (read) (write) 65 35 35 35 ? ns t ds80 t dh80 d0~d7 data setup time data hold time 30 10 ? ns t acc80 t od80 read access time output disable time c l = 100pf ? 10 50 50 ns t ssa80 t cssd80 t csh80 cs1/cs0 chip select setup time 10 10 20 ns cd t as80 t ah80 cs0 t cssa80 t cy80 t csh80 t cssd80 t pwr80 , t pww80 t hpw80 wr0 wr1 t ds80 t dh80 write d[x] t acc80 t od80 read d[x]
/26 ver. 1.0 14 (v dd =1.8v to 2.5v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t as80 t ah80 cd address setup time address hold time 0 10 ? ns t cy80 system cycle time 8 bits bus (read) (write) 4 bits bus (read) (write) 210 120 120 120 ? ns t pwr80 wr1 pulse width 8 bits (read) 4 bits (read) 100 55 ? ns t pww80 wr0 pulse width 8 bits (write) 4 bits (write) 55 55 ? ns t hpw80 wr0, wr1 high pulse width 8 bits bus (read) (write) 4 bits bus (read) (write) 100 55 55 55 ? ns t ds80 t dh80 d0~d7 data setup time data hold time 30 10 ? ns t acc80 t od80 read access time output disable time c l = 100pf - 10 ns t cssa80 t cssd80 t csh80 cs1/cs0 chip select setup time 10 10 20 ns
/26 ver. 1.0 15 f igure 16: parallel bus timing characteristics (for 6800 mcu) (v dd =2.5v to 3.3v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t as68 t ah68 cd address setup time address hold time 0 10 ? ns t cy68 system cycle time 8 bits bus (read) (write) 4 bits bus (read) (write) 140 128 128 128 ? ns t pwr68 wr1 pulse width 8 bits (read) 4 bits 65 35 ? ns t pww68 pulse width 8 bits (write) 4 bits 35 35 ? ns t lpw68 low pulse width 8 bits bus (read) (write) 4 bits bus (read) (write) 65 35 35 35 ? ns t ds68 t dh68 d0~d7 data setup time data hold time 30 10 ? ns t acc68 t od68 read access time output disable time c l = 100pf ? 10 50 50 ns t cssa68 t cssd68 t csh68 cs1/cs0 chip select setup time 10 10 20 ns cd t as68 t ah68 cs0 t cssa68 t cy68 t csh68 t cssd68 t pwr68 , t pww68 t lpw68 wr1 t ds68 t dh68 write d[7:0] t acc68 t od68 read d[7:0]
/26 ver. 1.0 16 (v dd =1 .8v to 2.5v , ta= ?30 to + 8 5 o c) symbol signal description condition min. max. units t as68 t ah68 cd address setup time address hold time 0 10 ? ns t cy68 system cycle time 8 bits bus (read) (write) 4 bits bus (read) (write) 210 120 120 120 ? ns t pwr68 wr1 pulse width 8 bits (read) 4 bits 100 55 ? ns t pww68 pulse width 8 bits (write) 4 bits 55 55 ? ns t lpw68 low pulse width 8 bits bus (read) (write) 4 bits bus (read) (write) 100 55 55 55 ? ns t ds68 t dh68 d0~d7 data setup time data hold time 30 10 ? ns t acc68 t od68 read access time output disable time c l = 100pf - 10 ns t cssa68 t cssd68 t csh68 cs1/cs0 chip select setup time 10 10 20 ns
/26 ver. 1.0 17 f igure 17: serial bus timing characteristics (for s8) (v dd =2.5v to 3.3v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t ass8 address setup time 0 ? ns t ahs8 cd address hold time 40 ? ns t cys8 system cycle time 135 ? ns t lpws8 low pulse width 65 ? ns t hpws8 sck high pulse width 65 ? ns t dss8 t dhs8 sda data setup time data hold time 30 10 ? ns t cssas8 t cssds8 t cshs8 cs1/cs0 chip select setup time 10 10 20 ns (v dd =1.8v to 2.5v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t ass8 address setup time 0 ? ns t ahs8 cd address hold time 60 ? ns t cys8 system cycle time 200 ? ns t lpws8 low pulse width 95 ? ns t hpws8 sck high pulse width 95 ? ns t dss8 t dhs8 sda data setup time data hold time 30 10 ? ns t cssas8 t cssds8 t cshs8 cs1/cs0 chip select setup time 10 10 20 ns cd t ass8 t ahs8 cs0 t cssas8 t cys8 t cshs8 t cssds8 t lpws8 t hpws8 sck t dss8 t dhs8 sda
/26 ver. 1.0 18 f igure 18: serial bus timing characteristics (for s9) (v dd =2.5v to 3.3v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t cys9 system cycle time 135 ? ns t lpws9 low pulse width 65 ? ns t hpws9 sck high pulse width 65 ? ns t dss9 t dhs9 sda data setup time data hold time 30 10 ? ns t cssas9 t cssds9 t cshs9 cs1/cs0 chip select setup time 10 10 20 ns (v dd =1.8v to 2.5v, ta= ?30 to +85 o c) symbol signal description condition min. max. units t cys9 system cycle time 200 ? ns t lpws9 low pulse width 95 ? ns t hpws9 sck high pulse width 95 ? ns t dss9 t dhs9 sda data setup time data hold time 30 10 ? ns t cssas9 t cssds9 t cshs9 cs1/cs0 chip select setup time 10 10 20 ns cs0 t css9 t cys9 t cshs9 t cssds9 t wls9 t whs9 sck t dss9 t dhs9 sda
/26 ver. 1.0 19 8. test of reliability ta=25 ?? no. test item content of test test condition 1 high temperature storage endurance test applying the high storage temperature for a long time 80 ?? 240h 2 low temperature storage endurance test applying the low storage temperature for a long time -30 ?? 240h restore 4h 3 high temperature operation endurance test applying the electric stress (voltage | current) and the thermal stress to the element for a long time 70 ?? 240h 4 low temperature operation endurance test applying the electric stress under low temperature for a long time -20 ?? 240h 5 high temperature /humidity storage endurance test applying the high temperature and high humidity storage for a long time 60 ?? 95%rh 240h 6 temperature cycle endurance test applying the low and high temperature cycle -30 ????? 25 ????? 80 ????? 25 ?? 30min 5min 30min 5min ??????????????? 1 cycle -30 ?? /80 ?? 10 cycles 7 vibration test (package state) endurance test applying the vibration during transportation 10hz~500hz, 100m/s 2 , 120min 8 shock test (package state) endurance test applying the shock during transportation half- sine wave, 300m/s 2 , 18ms 9 atmospheric pressure test endurance test applying the atmospheric pressure during transportation by air 25kpa 16h
/26 ver. 1.0 20 9. inspection requirement 9.1 inspection items and criteria for appearance defects items contents criteria protective glue no clear defects cover tape covering all of the chip and no clear crimple leakage not permitted rainbow according to the limit specimen wrong polarizer attachment not permitted not counted max. 3 defects allowed polarizer bubble between polarizer and glass <0.3mm 0.3mm ? ? 0.5mm scratches of polarizer according to the limit specimen not counted max. 3 spots allowed x<0.20mm 0.20mm ? x ? 0.5mm black spot (in viewing area) x=(a+b)/2 not counted max. 3 lines allowed black line (in viewing area) a<0.02mm 0.02mm ? a ? 0.05mm b ? 2.0mm max. 3 spots (lines) allowed progressive cracks not permitted
/26 ver. 1.0 21 inspection item and criteria for appearance defects (continued) items contents criteria a b c ? 3mm ? w/5 ? t / 2 cracks on pads ? 2mm ? w/5 t/2 /26 ver. 1.0 22 9.2inspection items and criteria for display defects items contents critera open segment or open common not permitted short not permitted wrong viewing angle not permitted contrast radio uneven according to the limit specimen crosstalk according to the limit specimen not counted max.3 dots allowed x<0.1mm 0.1mm ? x ? 0.2mm x=(a+b)/2 not counted max.2 dots allowed pin holes and cracks in segment (dot) a<0.1mm 0.1mm ? a ? 0.2mm d<0.25mm max.3 dots allowed not counted max.3 spots allowed x<0.1mm 0.1mm ? x ? 0.2mm black spot (in viewing area) x=(a+b)/2 not counted max.3 lines allowed black line (in viewing area) a<0.02mm 0.02mm ? a ? 0.05mm b ? 0.5mm max.3 spots (lines) allowed
/26 ver. 1.0 23 inspection items and criteria fo r display defects (continued) items content critera not counted max. 2 defects allowed x ? 0.1mm 0.1mm ? x ? 0.2mm x=(a+b)/2 not counted max. 1 defects allowed a ? 0.1mm 0.1mm ? a ? 0.2mm d>0 max.3 transfor- mation of segment max.2 defects allowed 0.8w ? a ? 1.2w a=measured value of width w=nominal value of width
/26 ver. 1.0 24 10 . quality level inspection examination or test at t amb =25 ?? (unless otherwise stated) min. max. unit il aql external visual inspection under normal illumination and eyesight condition, the distance between eyes and lcd is 25cm. see 9.1 ii major 1.0 minor 2.5 display defects under normal illumination and eyesight condition, display on inspection. see 9.2 ii major 1.0 minor 2.5 note: major defects: open segment or co mmon, short, serious damages, leakage miner defects: others sampling standard conforms to gb2828
/26 ver. 1.0 25 11. precautions for use of lcd modules 11.1 handling precautions 11.1.1 the display panel is ma de of glass. do not subject it to a mechanical shock by dropping it from a high place, etc. 11.1.2 if the display panel is damaged a nd the liquid crystal substance inside it leaks out, be sure not to get any in your mouth, if the substance comes into contact with your skin or clothes, promptly wash it off using soap and water. 11.1.3 do not apply excessive force to th e display surface or the adjoining areas since this may cause the color tone to vary. 11.1.4 the polarizer coveri ng the display surface of the lcd module is soft and easily scratched. handle this polarizer carefully. 11.1.5 if the display surface is contam inated, breathe on the surface and gently wipe it with a soft dry cloth. if s till not completely clear, moisten cloth with one of the following solvents: ?a isopropyl alcohol ?a ethyl alcohol solvents other than those men tioned above may damage the polarizer. especially, do not use the following: ?a water ?a ketone ?a aromatic solvents 11.1.6 do not attempt to disassemble the lcd module. 11.1.7 if the logic circuit power is off, do not apply the input signals. 11.1.8 to prevent destruction of the elem ents by static electr icity, be careful to maintain an optimum work environment. a. be sure to ground the body when handling the lcd modules. b. tools required for assembly, such as soldering irons, must be properly ground. c. to reduce the amount of sta tic electricity gene rated, do not conduct assembly and other work under dry conditions. d. the lcd module is coated with a film to protect the display surface. be care when peeling off this protective film since static electricity may be generated.
/26 ver. 1.0 26 11.2 storage precautions 11.2.1 when storing the lcd modules, avoid exposure to direct sunlight or to the light of fluorescent lamps. 11.2.2 the lcd modules should be stored under the storage te mperature range. if the lcd modules will be stored for a long time, the recommend condition is: temperature : 0 ?? ?? 40 ?? relatively humidity: ? 80% 11.2.3 the lcd modules should be stored in the room without acid, alkali and harmful gas. 11.3 the lcd modules should be no falling and violent shocking during transportation, and also should avoid excessive press, water, damp and sunshine.

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